Power devices are electronic components designed for use in the comparatively high voltage and high current applications. These devices may be implemented in widely varying applications to include lighting, automotive, consumer and appliance applications. Power devices include semiconductor devices that are adapted to function at high voltage and high current. One type of semiconductor device that is often implemented in power devices is power lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect-transistor (FET) device, referred to herein as a power LDMOS device. Another type of semiconductor device that is often implemented in such applications is a lateral High-Voltage MOSFET (HVFET).
As power technologies develop, power applications require power LDMOS devices to be cheaper and smaller in physical size. Often, the demands on the reduced size do not relax the power requirements; rather the power requirements may be the same or even increased. Moreover, there is a need to provide these devices with a comparatively high breakdown voltage (VBD), depending on the application. One LDMOS device adapted to provide the high breakdown voltage requirement combined with good on-state properties includes a reduced surface field (RESURF) structure. A power LDMOS or HVFET device having a RESURF structure comprises a first semiconductor region, which serves as a RESURF drift region, having one conductivity type; and a second semiconductor region, which serves as a charge balance region, having a different conductivity type. Moreover, the LDMOS and HVFETs may have one or a plurality of channels in the drift region of the device.
As is known, high-voltage devices are usefully self-terminated in order to avoid premature breakdown at the edges of the device. This self-termination implies that the layout of the device contains curved as well as straight sections. The drain is placed in the center of the layout, and the source is at the edge. Drain and source may however be interchanged. Similarly, in the case of a high-voltage diode, either the cathode or the anode can be placed in the center of the layout. Moreover, the drain extensions are designed to reduce the electric field, or spread the electric potential, between source and drain as much as possible. Near the drain and source, however, the proximity of another drain extension from a next finger forces the potential lines to curve and the lateral electric field to change its direction over a relatively short distance. This results in a peak in the electric field (known as the cylindrical effect), which reduces the breakdown voltage. At the finger-tips of an interdigitated power device the adverse effects of electric field concentration (known as the spherical effect) are even stronger and the breakdown voltage is even further reduced. This situation also depends on the actual dopant distribution in the device.
One known technique designed to decrease the electric field is to enlarge the distance between both sides of the drain extensions of an extended drain structure. However, this requires an increased device area, which is counterproductive to the desired goal of reduced physical size of devices and cost of components.
There is a need, therefore, for a method of fabricating power semiconductor devices that overcomes at least the shortcomings and disadvantages of the known methods described.